PyTorch fixes CUDA architecture suffix stripping in Inductor

A recent PyTorch pull request (#187888) addresses a critical bug in the Inductor compiler that stripped compute-capability suffixes from PTX files during AOT compilation. The issue emerged in tests where Triton emitted PTX with architecture targets like 'sm_100a' (the 'a' suffix indicating a variant architecture). When Inductor's `_aoti_cuda_target_arch` function stripped this suffix, nvcc would fail with 'ptxas fatal: PTX with .target 'sm_100a' cannot be compiled for architecture 'sm_100'', returning exit code 255. This specifically broke tests such as `test_compile_standalone_cos` in the AOT Inductor package for CUDA.

The fix, authored with codex and approved by jansel, modifies `_aoti_cuda_target_arch` to preserve the full compute-capability string including suffixes. By not stripping suffixes, the PR ensures that PTX files compiled for architecture variants can be correctly assembled into fatbinaries. This is particularly important for upcoming NVIDIA GPU architectures like Blackwell (compute capability 10.0) that may use variant suffixes to distinguish between different configurations or feature sets. The change maintains backward compatibility while enabling future-proof compilation of Triton-generated PTX code.