PyTorch adds oneDNN LSTM primitive for 40% faster XPU inference
New primitive cuts LSTM latency from 34ms to 5ms on Intel PVC
PyTorch's latest commit adds native oneDNN LSTM primitive support for XPU inference, replacing the previous per-timestep fused cell approach. By using `dnnl::lstm_forward`, the entire LSTM sequence is processed in a single internal operation, eliminating O(T) kernel launches. The new path handles weight layout transformation from PyTorch's `[4*H, I]` to oneDNN's `ldgoi` format, weight reordering, and scratchpad management. Inference benchmarks on Intel PVC (Ponte Vecchio) with a bidirectional LSTM (hidden=256) show LSTM latency dropping from ~34ms to ~5ms and end-to-end Kokoro TTS inference improving by 40% (1.06s down to 0.635s). The implementation also includes packed sequence unwrapping for uniform batch sizes (common in batch=1 inference) and an XPU-specific LSTMCell fallback for training.
The change preserves correctness: gate order (i, f, c̃, o) is identical between oneDNN and PyTorch, and the primitive’s formula `gates = W·x + U·h + B` matches PyTorch’s approach with summed biases. Verified maximum differences are below 1e-6 compared to CPU reference across multiple configurations. The update only affects XPU hardware; CUDA and CPU inference paths remain unchanged. This is a significant performance boost for any LSTM‑based X PU deployment, from speech synthesis to NLP, and aligns PyTorch’s XPU backend with optimizations already available on other accelerators.
- LSTM latency dropped from ~34ms to ~5ms on Intel PVC, a 6.8x speedup for the LSTM operation.
- End-to-end Kokoro TTS inference improved by 40% (from 1.06s to 0.635s).
- Eliminates O(T) kernel launches by processing the entire sequence in one `dnnl::lstm_forward` call.
Why It Matters
Major inference speedup for LSTM workloads on Intel XPU, enabling faster speech and NLP applications.