The Forward-In-Time-Only Assumption in SmartNIC Resource Management: A Critique of Wave and the Case for Bilateral Interaction

A new technical paper by researcher Paul Borrill delivers a fundamental critique of the prevailing architecture for SmartNICs, the specialized processors increasingly used to manage datacenter resources. The paper focuses on 'Wave,' a system demonstrated on Intel's Mount Evans Infrastructure Processing Unit (IPU) that offloads kernel scheduling and memory management to the SmartNIC's ARM cores. While Wave's engineering is careful, Borrill argues its 350% performance degradation without specific PCIe latency mitigations is not just an engineering hurdle but a symptom of a deeper 'Forward-In-Time-Only' (FITO) architectural flaw.

This FITO model means every host-SmartNIC interaction is a unidirectional message (event forward, decision back), creating a window where decisions become stale before enforcement. Wave's complex stack of optimizations—like write-combining and prefetching—exists solely to hide this vulnerability. Borrill systematically applies the FITO diagnostic, tracing the issue to foundational models in distributed computing, and proposes a radical alternative.

He makes the case for 'Open Atomic Ethernet's bilateral swap primitive,' which can be implemented on the same Intel IPU hardware. This approach enables true two-way, atomic communication, dissolving the latency, atomicity, and timeout problems that Wave's architecture must engineer around. The paper's core argument is that while the SmartNIC is the right location for resource management, the industry has adopted the wrong communication primitive to make it work efficiently.