ODIN-Based CPU-GPU Architecture with Replay-Driven Simulation and Emulation

A research team from Intel has unveiled a breakthrough validation methodology for its next-generation ODIN integrated chiplet architecture, detailed in a new arXiv paper. The core challenge addressed is the immense complexity of pre-silicon validation for tightly coupled CPU-GPU subsystems in chiplet designs, where non-deterministic execution and intricate protocol interactions can stretch integration cycles to multiple years. The team's solution is a replay-driven approach that captures deterministic waveforms from the design and reliably replays them across both simulation and emulation environments using a single, unified design database.

This methodology was applied to a foundational system-on-chip (SoC) building block containing a CPU subsystem, multiple Xe GPU cores, and a configurable Network-on-Chip (NoC). By enabling the reliable reproduction of complex GPU workloads and protocol sequences at the full system level, the technique transforms the debug process. The paper reports a dramatic reduction in integration time, with the team achieving a full system boot and executing real workloads within a single quarter—a timeline previously unthinkable for such complex heterogeneous systems. This represents a scalable validation framework critical for the future of chiplet-based computing, where modular components from different vendors must be seamlessly integrated.