CoTM Framework Cuts NoC Link Utilization by 47.85% with Coherence-Aware Mapping

Existing task mapping approaches for many-core Network-on-Chip (NoC) systems rely on predefined task graphs derived from program structure or runtime traces. These graphs fail to capture coherence-induced interactions from shared data accesses, leading to a partial representation of inter-task relationships. As a result, mappings ignore a significant portion of NoC communication — cache coherence traffic — yielding suboptimal performance and wasted energy. The mismatch between modeled and actual runtime behavior has become a critical bottleneck as application scale and complexity increase.

To address this, researchers from NTU Singapore propose CoTM (Coherence-aware Task Mapping). CoTM infers inter-task dependencies directly from dynamic coherence behavior, building a more accurate task graph without manual graph construction. It employs a lightweight heuristic with multi-start optimization, guided by a penalty function that jointly considers coherence traffic and NoC metrics. Evaluations show CoTM reduces average link utilization by up to 47.85% and total energy consumption by up to 10.30% over baseline methods. Accepted at ICCAD 2026, this work highlights the untapped potential of coherence-aware optimization for future many-core designs, particularly in data centers and AI accelerators.