LPV power capping controller beats Intel RAPL in HPC mixed workloads
Polytopic LPV controller cuts tracking error and variance versus static RAPL limits
Static power capping mechanisms like Intel's Running Average Power Limit (RAPL) offer only basic control and struggle with dynamically varying HPC workloads. To address this, a team from LIG, GIPSA-MODUS, and CTRL-A developed a feedback control strategy that adapts power caps in real time. They compared a gain-scheduled proportional-integral (PI) controller against a polytopic linear parameter-varying (LPV) controller synthesized via H∞ control, both scheduled by a workload indicator that switches between memory and compute phases.
In evaluations under practical power cap constraints, both controllers respected power limits, but the LPV design delivered significantly better performance: lower tracking error, lower control variance, and smoother transitions during phase changes than gain-scheduled PI. The work, published on arXiv (2608.03367), demonstrates that advanced control theory can outperform static hardware mechanisms in mixed workload environments. For HPC operators running diverse jobs, this approach promises tighter energy management without sacrificing performance, potentially reducing operational costs and carbon footprint.
- Polytopic LPV controller synthesized via H∞ control outperforms gain-scheduled PI in power capping
- LPV achieves lower tracking error, lower control variance, and smoother transients during compute/memory phase switches
- Static Intel RAPL lacks the flexibility needed for mixed HPC workloads, motivating dynamic feedback strategies
Why It Matters
Dynamic power capping lowers energy costs and boosts HPC efficiency without degrading performance under real-world workload mixes.