Lightweight True In-Pixel Encryption with FeFET Enabled Pixel Design for Secure Imaging

A team of researchers from Purdue University and other institutions has unveiled a breakthrough in secure imaging hardware with their 'SecurePix' architecture. Published on arXiv, the work introduces a compact pixel design that performs encryption directly within each sensor pixel before any data is transmitted. The core innovation is the use of a ferroelectric field-effect transistor (FeFET), a non-volatile memory technology, to create a programmable, analog encryption key. This means the photodiode's voltage is converted into an encrypted analog output inside the pixel itself, a process they term 'true in-pixel encryption.' The design, simulated in HSPICE and laid out for a 45nm CMOS process, achieves a remarkably small pixel pitch of just 2.33 by 3.01 micrometers.

The security impact is dramatic. In full-image evaluations, the encryption rendered standard AI vision models nearly useless. ResNet-18's recognition accuracy on the MNIST dataset crashed from 99.29% to just 9.58%, and from 91.33% to 6.98% on CIFAR-10, demonstrating strong resistance to neural-network-based inference attacks. Authorized receivers with the symmetric key can decrypt the images using a lookup-table-based inverse mapping. Crucially, the hardware overhead is minimal, with a per-pixel sensing power-delay product of only 1.25 µW·µs. This addresses a critical vulnerability in modern imaging pipelines where visual data is exposed on readout lines, enabling end-to-end security from the moment light hits the sensor.