iScript: A Domain-Adapted Large Language Model and Benchmark for Physical Design Tcl Script Generation
A new Qwen3-8B model fine-tuned for chip design scripting solves a critical bottleneck in semiconductor engineering.
A research team has introduced iScript, a large language model specifically adapted to generate Tcl scripts for Electronic Design Automation (EDA) tools like Cadence Innovus, addressing a major pain point in semiconductor physical design. General-purpose LLMs like GPT-4 and Claude struggle with this domain due to extreme data scarcity, highly specialized semantics, and the need for near-perfect reliability in scripts that control multi-million-dollar chip fabrication. The researchers' solution pairs the iScript model, built on the Qwen3-8B architecture, with iScript-Bench, a comprehensive new benchmark covering five task categories and three difficulty levels to properly evaluate performance in this niche.
To train iScript, the team developed a multi-stage data synthesis pipeline that extracts commands, performs static linting, infers requirements, and generates Chain-of-Thought reasoning, ultimately producing a 10,000-sample dataset of (requirement, CoT, script) tuples. The model was then trained using a two-stage process of domain-adaptive pretraining followed by supervised fine-tuning. For evaluation, they proposed a two-step verification framework combining static syntax checks with LLM-based functional assessment. Results show iScript achieves higher pass@k scores than leading general LLMs, proving the effectiveness of targeted domain adaptation and synthetic data generation for automating complex, reliability-critical engineering workflows.
- iScript is a Qwen3-8B model fine-tuned for generating Tcl scripts in Cadence Innovus, a core EDA tool for semiconductor physical design.
- The team created a 10,000-sample synthetic dataset using a novel pipeline to overcome the extreme scarcity of real training data for this domain.
- On the new iScript-Bench benchmark, the model outperforms state-of-the-art general LLMs, demonstrating specialized AI can automate high-stakes engineering tasks.
Why It Matters
Automates a critical, error-prone bottleneck in chip design, potentially accelerating semiconductor development and reducing costly human errors.