New PCIe-based interface speeds up hybrid quantum-classical computing

Hybrid classical-quantum computing systems rely on frequent data exchange between classical processors and quantum control hardware, but existing setups often use loosely-coupled interfaces like Ethernet, causing high latency and limited throughput. To solve this, researchers from multiple Chinese institutions developed HI-HCQC, a tightly-coupled hardware interface built on an RFSoC (Radio Frequency System-on-Chip) platform. HI-HCQC integrates high-speed RF-DACs, RF-ADCs, programmable logic, embedded processors, clock synchronization circuits, and a PCIe Gen3 x8 interface, enabling direct microwave pulse synthesis, qubit readout, and high-throughput data transfer between host servers and quantum measurement-control units. This architecture eliminates the bottlenecks of traditional network-based approaches.

Experimental results demonstrate that HI-HCQC supports six independent control channels and one multiplexed readout channel, achieving stable microwave generation and acquisition. The team validated the system by performing a full suite of quantum characterization tasks: qubit spectroscopy, Rabi oscillations, T1 relaxation measurements, single-shot readout, randomized benchmarking, and CZ-gate characterization. Compared with a conventional Ethernet-based control system, HI-HCQC significantly reduces end-to-end execution latency for representative quantum gate and circuit tasks and notably improves task throughput. These results suggest that PCIe-coupled RFSoC control hardware offers a practical, scalable foundation for next-generation hybrid classical-quantum computing systems.