New FPGA chip runs spiking neural nets at 0.45 mJ per digit
96% accuracy on MNIST with just 4-bit weights and 44 images
Researchers Harmeling, De Geeter, and Drion present an FPGA accelerator for Spiking Recurrent Cell (SRC) neurons on an Artix-7 XC7A200T at 100 MHz. By using mathematical simplifications that remove costly tanh and exp operations and avoiding floating-point arithmetic via scaling and piecewise approximations, they keep hardware costs low. The reference implementation achieves 96.31% accuracy with a 220-image spiking trace and a processing time of 1.7424 ms per digit. Reducing trace length and quantizing synaptic weights yields 93.32% accuracy at 0.55 mJ per digit (55 images, 5-bit weights) and 92.89% at 0.45 mJ (44 images
- 96.31% accuracy on MNIST with 220-image traces at 1.7424 ms per digit
- Energy drops to 0.45 mJ per digit (92.89% accuracy) with 44 images and 4-bit quantized weights
- Removes tanh and exp operations, uses piecewise approximations and scaling on Artix-7 FPGA
Why It Matters
This opens the door for biologically realistic SNNs on low-power edge devices, challenging simpler LIF models.