ASTRA-sim 3.0 simulates distributed ML with cache-line GPU accuracy

ASTRA-sim 3.0, developed by William Won, Jinsun Yoo, and 17 other researchers from Georgia Tech, AMD, and other institutions, is a major upgrade to the community-driven distributed ML simulator. The key innovation is fine-grained simulation at cache-line-sized load-store granularity, paired with a detailed GPU execution model. This achieves high fidelity in capturing control and data paths, essential for accurate modeling of latency-sensitive collective communication in modern inference workloads. The authors also introduce InfraGraph, a standardized representation for describing distributed ML network infrastructure in detail, enabling consistent comparisons across hardware and network topologies.

With these improvements, ASTRA-sim 3.0 opens new design space exploration opportunities. The paper demonstrates its use for designing optimized collective algorithms, evaluating network requirements, and testing GPU architecture changes. The simulator balances scalability and fidelity, making it practical for researchers and engineers working on large-scale AI systems. This release addresses a critical gap in the ecosystem, as modeling distributed training and inference at high fidelity has become necessary for scaling AI workloads efficiently.