Huawei's Ascend 910 NPU runs scientific workloads with 5 custom optimizations

A team from multiple Chinese institutions has demonstrated that Huawei's Ascend 910 NPU series—originally built for low-precision AI training—can be repurposed for scientific computing with careful optimization. In their paper "Ascend to Science: Exploration of AI Chips for Scientific Computing," the researchers identified key bottlenecks: low numerical precision, irregular memory access, and limited scalability. They then developed workload-specific mappings for five benchmark applications: HPL-MxP (mixed-precision LINPACK), LRSVD (low-rank SVD), SGEMM-cube (matrix multiplication), PQSim (photon quantum simulation), and SMC-X (sequential Monte Carlo). The team employed heterogeneous execution (mixing tensor cores with scalar units), mixed-precision numerical formulations, precision emulation to recover accuracy, hierarchical memory orchestration to manage irregular access patterns, and communication-computation overlap to hide latency.

The results show that AI-native NPUs can achieve numerical robustness and competitive performance when these techniques are applied in a coordinated manner. For example, the mixed-precision formulations maintained double-precision accuracy while leveraging the NPU's fast tensor engines. The memory hierarchy optimizations reduced data movement by up to 40% compared to naive implementations. The study also distinguishes transferable optimization principles (e.g., precision emulation via software) from Ascend-specific implementation details such as proprietary memory controllers. This work provides a practical case study for the HPC community, showing that tensor-centric accelerators can be viable alternatives to traditional CPUs and GPUs for scientific workloads—provided the right software stack and algorithmic adaptations are in place.