A 0.5-V Linear Neuromorphic Voltage-to-Spike Encoder Using a Bulk-Driven Transconductor

A research team has developed a groundbreaking neuromorphic chip component that could dramatically reduce the power consumption of edge AI devices. The voltage-to-spike encoder, created by Meysam Akbari, Erika Covi, and Kea-Tiong Tang, achieves near-linear conversion of analog voltages to digital spike rates while operating at an ultra-low 0.5 volts. Fabricated using TSMC's 0.18-μm CMOS process, the chip consumes just 22-180 nanowatts of power—less than many simple LED indicators—and occupies a minuscule 0.0074 square millimeters of silicon real estate.

The encoder's key innovation lies in its bulk-driven transconductor design paired with a differential pair integrator (DPI)-based leaky integrate-and-fire (LIF) neuron. This architecture linearizes both the voltage-to-current and current-to-spike conversion processes, achieving less than 5.6% deviation from perfect linearity across a 0.1-0.4 volt input range. By using a tail-less bulk-driven differential pair and a translinear linearization network, the design suppresses the dominant sinh nonlinearity that typically plagues such converters while maintaining tunable gain through bias current adjustment.

This breakthrough addresses a critical bottleneck in neuromorphic computing: efficiently converting real-world analog sensor data into the digital spike trains that neuromorphic processors understand. The encoder's extreme power efficiency and small footprint make it ideal for always-on sensor nodes in IoT devices, biomedical implants, and other battery-constrained applications where traditional analog-to-digital converters would consume prohibitive amounts of energy. The research represents a significant step toward practical, energy-efficient neuromorphic systems that can process sensory data at the edge with biological-level efficiency.